The present invention relates generally to electrostatic discharge (ESD) in integrated circuits and, more particularly, to an ESD bypass device for protecting bipolar emitter follower circuits.
Electrostatic Discharge (ESD) events, which can occur both during and after manufacturing of an integrated circuit (IC), can cause substantial damage to the IC. In particular, there are three general types of ESD events that have been modeled: the human body model (HBM), the machine model (MM) and the charged device model (CDM). The HBM and MM represent discharge current between any two pins on an IC as a result of (respectively) a human body discharging through a chip and a metal tool discharging through a chip. Whereas a human body discharge is relatively slow in terms of rise time and has a unidirectional current in the range of about 1-3 amps, a tool discharge is a relatively rapid event that produces an even higher, bi-directional current into and out of the pin (e.g., about 3-5 amps). In the CDM, the ESD event does not originate from outside the IC device itself, but instead represents the discharge of an IC device to ground. The IC device is charged through the triboelectric effect (frictional charging) or by an external field. The charging of the device substrate itself does not subject the IC to ESD damage, but rather the discharging. As is the case with the MM, the CDM is a very rapid event.
Because of this potential damage, on-chip ESD protection or bypass circuits for IC chips have become commonplace. In general, such protection circuits are characterized by a high failure threshold, a small layout size and a low resistive/capacitive (RC) delay so as to allow high-speed applications. An ESD event within an IC can be caused by a static discharge occurring at one of the power lines or rails. An effective ESD bypass device should maintain the voltage at the power line to a value that is known to be acceptable for the operating circuits, and that will not interfere with the operating circuits under normal operating conditions.
An ESD bypass device circuit is typically constructed between a positive power supply rail (e.g., VDD) and a ground plane, a ground plane and a negative power supply rail (e.g., VSS), or a supply rail and an external connection to the chip. The primary purpose of the ESD clamp is to reduce the impedance between the rails so as to reduce the impedance between the input pad and the rail, and to protect the power rails themselves from ESD events. In particular, bipolar emitter follower amplifiers present a difficult ESD protection challenge because they are biased into forward active operation during a negative ESD discharge when the reference pin is the power supply. To protect these circuits, it is therefore desirable to implement a bypass device that will conduct current in parallel with the emitter follower device during an ESD discharge, but does not conduct current in normal circuit operation.